Journal Papers

J29 G. Angius, D.Pani, L.Raffo, P. Randaccio, S. Seruis, “A tele-home care system exploiting the DVB-T technology and MHP”, Methods of Information in Medicine 2008 47 3: 223-228
J28
S. Muceli, D. Pani, L. Raffo. "Real-time fetal ECG extraction with JADE on a floating point DSP". Electronics Letters, Vol 43, Number 18, 31th August 2007
J27 P.Meloni, I.Loi, F.Angiolini, S.Carta, M.Barbaro, L.Raffo, L.Benini. "Area and Power Modeling for Networks-on-Chip with Layout Awareness", VLSI Design, vol. 2007, Article ID 50285, 12 pages, 2007
J26 S.Murali, D.Atienza, P.Meloni, S.Carta, L. Benini, G. De Micheli, L.Raffo. "Synthesis of Predictable Networks-on-Chip Based Interconnect Architectures for Chip Multi-Processors". accepted for pubblication on IEEE Transactions On VLSI
J25 F.Angiolini, P.Meloni, S.Carta, L.Benini, L.Raffo. "A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs", IEEE Transactions On Computer Aided Design, vol. 26, March 2007, pp. 421-434
J24 S.Murali, P.Meloni, F.Angiolini, D.Atienza, S.Carta, L. Benini, L.Raffo, G. De Micheli. "Complete Tool Flow for Designing Networks-on-Chips Based Communication Architectures for Application-Specific Systems-on-Chips". accepted for publication (brief article) on IEEE Transactions On VLSI
J23 M. Barbaro, A. Bonfiglio, L. Raffo, A. Alessandrini, P. Facci, I. Barák, “Fully electronic DNA hybridization detection by a standard CMOS biochip”, Sensors and Actuators B: Chemical, 2006, Vol.118, Issue 1-2, October 2006, pp. 41-46
J22 M. Barbaro, A. Bonfiglio, L. Raffo, A. Alessandrini, P. Facci, I. Barák, “A CMOS, Fully Integrated Sensor for Electronic Detection of DNA Hybridization”, IEEE Electron Devices Letters, 2006, Vol. 27, issue 7, July 2006, pp. 595-597
J21 S.M. Carta, D. Pani, L. Raffo, “Reconfigurable Coprocessor for Multimedia Application Domain”, Journal of VLSI Signal Processing Systems, Vol. 44, Issue 1-2, August 2006, pp. 135-152
J20 D. Pani, L. Raffo, “Stigmergic approaches applied to flexible fault-tolerant digital VLSI architectures”, Journal of Parallel and Distributed Computing, Volume 66, Issue 8, (August 2006), pp. 1014-1024
J19 M. Barbaro, A. Bonfiglio, L. Raffo, "A Charge-Modulated FET for Detection of Biomolecular Processes: Conception, Modeling and Simulation", IEEE Transactions on Electron Devices, 2006, Vol. 53, No. 1, January 2006, pp. 158-166
J18 M. Barbaro, L. Raffo, "A Low-Power Integrated Smart Sensor with on-Chip Real-Time Image Processing Capabilities ", EURASIP Journal on Applied Signal Processing, 2005, Vol. 7, pp. 1062-1070
J17 S. Bolliri, L. Raffo, "A Micro-Power Analog IC for Battery-Operated Systems ", IEICE Transactions, 2003, Vol. 86c, Number 7
J16 S. M. Carta, L. Raffo, "A High Performance - Low Power Reconfigurable GSM Voice Coding Coprocessor With Standard Interface", IEICE Transactions, 2003, Vol. 86c, Number 4
J15 E. Atzori, S.M. Carta, L. Raffo, "44.6% processing cycles reduction in GSM voice coding by low-power reconfigurable co-processor architecture", Electronics Letters, 2002, Vol. 38, Number 24
J14 M. Barbaro, P.-Y. Burgi, A. Mortara, P. Nussbaum, F. Heitger "A 100x100 Pixel Silicon Retina For Gradient Extraction With Steering Filter Capabilities And Temporal Output Coding", IEEE Journal of Solid State Circuits, 2002, Vol. 37, Number 2, pp. 160-172 (ISSN 0018-9200)
J13 M. Barbaro, L. Raffo, "Analysis and synthesis of double-layer MOSFET networks for smart sensory systems", Electronics Letters, 1998, Vol. 34, N.20
J12 L. Raffo, S.P. Sabatini, G.M. Bo, G.M. Bisio. Analog VLSI Circuits as Physical Structures for Perception in Early Visual Tasks IEEE Transaction on Neural Networks 9(3):525-531,1998
J11 G.M. Bisio, L. Raffo, and S.P. Sabatini. Analog VLSI primitives for perceptual tasks in machine vision. Neural Computing and Applications (invited), 1998
J10 B. Crespi, A.G. Cozzi, L. Raffo, S.P. Sabatini. Analog computation for phase-based disparity estimation: continuous and discrete models. Machine Vision and Applications ,1998
J9 L. Raffo, S.P.Sabatini, M.Mantelli, A.De Gloria, G.M. Bisio. The design of an ASIP architecture for low-level visual elaborations. IEEE Transaction on VLSI Systems 5(1):145-153, 1997
J8 S.P. Sabatini, G.M. Bisio, L.Raffo. Functional coupling induced through clustered recurrent inhibition in a linear averaged model of the visual cortex Neural Computation 9(3):525-531, 1
J7 L. Raffo. Analisys and Synthesis of resistive networks for distributed visual elaborations. IEE-Electronics Letters,vol. 32 n. 8, pagg. 743-744, 1996.
J6 G. Indiveri, L. Raffo, S.P. Sabatini, and G.M. Bisio. A recurrent neural architecture mimicking cortical preattentive vision systems. Neurocomputing, vol. 11 num. 2-4, 1996
J5 L. Raffo, S.P. Sabatini, and G.M. Bisio. A programmable VLSI architecture based on multilayer CNN paradigms for real-time visual processing International Journal on Circuit Theory and Applications, in stampa sul vol. 24 num. 3, 1996.
J4 M. Valle, L. Raffo, D.D. Caviglia, G.M. Bisio. A VLSI image processing architecture dedicated to real time quality control analysys in an industrial plant Real Time Imaging Journal - Special Issue on Special Purpose Architecture for Real Time Imaging 2:361-371,1996.
J3 Indiveri, L. Raffo, S.P. Sabatini, G.M. Bisio. A neuromorphic architecture for cortical multi-layer integration of early visual tasks. Machine Vision and Applications, v.8, pagg. 305-314, 1995.
J2 L. Raffo: Resistive network implementing maps of Gabor functions of any phase IEE-Electronics Letters, vol. 31 n. 22, pagg. 1913-1914,1995.
J1 L. Raffo. Adaptive resistive network for stereo depth estimation IEE-Electronics Letters,vol. 31 n. 22, pagg. 1909-1910, 1995.

Conference Papers

C49 D. Pani, L. Raffo, “A DSP Algorithm and System for Real-Time Fetal ECG Extraction”, Proc. 35th annual Conference on Computers in Cardiology, Bologna, Italy, September 14-17, 2008, pp. 1065-1068
C48 G. Angius, D. Pani, L. Raffo, P. Randaccio, “A DVB-T Framework for the Remote Monitoring of Cardiopathic and Diabetic Patients”, 35th annual Conference on Computers in Cardiology, Bologna, Italy, September 14-17, 2008, pp 1001-1004
C47 F. Palumbo, S. Secchi, D. Pani, L. Raffo, “Non-Exclusive Dual-Mode Approach for NoC Designs”, ACACES 2008, Fourth International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems, July 13-19, 2008 L'Aquila, Italy, pp. 259-262, ISBN: 978 90 382 1288 3
C46
G. Angius, D. Pani, L. Raffo, P. Randaccio “DVB-T and MHP: a possible platform for telemedicine”, 2nd Summer School on Advanced Technologies for Neuro-motor Assessment and Rehabilitation, 13th-19th July 2008, Monte S.Pietro, Bologna, Italy, pp. 88-89, ISBN: 88-900847-7-4
C45
D. Pani, L. Raffo, “An on-line algorithm and its DSP implementation for real-time separation of the foetal ECG”, Atti Primo Congresso Nazionale di Bioingegneria, July 3-5, 2008, Pisa, Italy, Vol. I, 577-578
C44 S. Secchi, F. Palumbo, D. Pani, L. Raffo, “A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching” Proc. 11th EUROMICRO Conference on Digital System Design (DSD 2008), Parma, Italy, September 3-5, 2008, IEEE Computer Society P3277, 141-148
C43 F. Palumbo, S. Secchi, D. Pani, L. Raffo, “A Novel Non-Exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs”, Proc. SAMOS 2008 International Workshop on Systems, Architectures, Modeling, and Simulation, Samos, Greece, July 21-24, 2008, LNCS 5114, 96-105
C42
G. Angius, D.Pani, L.Raffo, P. Randaccio, S. Seruis, “A Pervasive Telemedicine System Exploiting the DVB-T Technology”, Proc. PERVASIVE HEALTH 2008, 2nd International Conference on Pervasive Computing Technologies for Healthcare 2008, Tampere, Finland 30 Jan - 1 Feb 2008
C41 G. Angius, D.Pani, L.Raffo, P. Randaccio, S. Seruis, “A DVB-T based system for the diffusion of Tele-home care practice” Proc. HEALTHINF 2008, International Conference on Bio-inspired Systems and Signal Processing, Funchal, Madeira – Portugal, January 28-31, 2008, 31-36
C40 S. Muceli, D.Pani, L.Raffo, “Non-Invasive real-time fetal ECG extraction: a block-on-line DSP implementation based on the JADE algorithm” Proc. BIOSIGNALS 2008, International Conference on Bio-inspired Systems and Signal Processing, Funchal, Madeira – Portugal, January 28-31, 2008, Vol.2, 458-463
C39
F. Palumbo, D. Pani, L. Raffo, S. Secchi, “A surface tension and coalescence model for dynamic distributed resources allocation in Massively Parallel Processors on-Chip” In: KRASNOGOR N., NICOSIA G., PAVONE M, PELTA D. Nature Inspired Cooperative Strategies for Optimization (NICSO 2007), Vol. 129/2008, pp. 335-345. Springer-Verlag Heidelberg
C38 G. Busonera, S. Carucci, D. Pani, L. Raffo, “Self-Organization on Silicon: System Integration of a Fixed-Point Swarm Coprocessor” Proc. NICSO2007 International Workshop on Nature Inspired Cooperative Strategies for Optimization, 8-10 Nov. 2007, in press
C37 G. N. Angotzi, M. Barbaro, P. G. A. Jespers, "Comparison of various architectures for algorithmic two-steps A to D converters.'', Proceedings of the International conference on Sensors, Circuits and Instrumentation Systems, 19-22 March 2007, Hammamet, Tunisia.
C36 Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, and Luca Benini, “65 nm NoC Design: Opportunities and Challenger”, to appear in Proc. Of International Symposium on Networks-on-Chip (NOCS 2007), May 7-9 2007, Princeton, New Jersey, USA
C35 S. Murali, P. Meloni, F. Angiolini, D. Atienza, S. Carta, L. Benini, G. De Micheli, L. Raffo, "Design of Application-Specific Networks on Chips with Floorplan Information", Proceedings of ICCAD 06, San Jose (USA), Nov 5-9, 2006
C34 S. Murali, P. Meloni, F. Angiolini, D. Atienza, S. Carta, L. Benini, G. De Micheli, L. Raffo, “Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips”, Proceedings of the IFIP VLSI-SOC Conference 2006, Nice, France, Oct 16-18, 2006, pp. 158-163
C33 S. Murali, D. Atienza, G. De Micheli, F. Angiolini, L. Benini, P. Meloni, S. Carta, L. Raffo, “SunFloor: Application-Specific Design of Networks-on-Chip”, Poster presentation at University Booth at the Design, Automation and Test in Europe Conference and Exhibition 2006, Munich, Germany, Mar 6-10, 2006
C32 F. Angiolini, P. Meloni, S. Carta, L. Benini, L. Raffo, “Contrasting a NoC and a Traditional Interconnect Fabric with Layout Awareness”, Proc. of the Design, Automation and Test in Europe Conference and Exhibition 2006, Munich, Germany, Mar 6-10, 2006
C31 M. Barbaro, G. N. Angotzi (2006). "Compact, low-power, analogue building blocks derived from MOSFETs translinear loops". Proc. of 13th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), 10-13 December 2006, Nice (France)
C30 P. Meloni, S. M. Carta, R. Argiolas, L. Raffo, F. Angiolini, "Area and Power Modeling Methodologies for Networks-on-Chip", Proc. of 1st International Conference on Nano-Networks (Nano-Net 2006), 14-16 September 2006, Lausanne (Switzerland)
C29 P. Meloni, M. Camplani, L. Raffo, S. M. Carta, S. Murali, G. De Micheli, "Routing Aware Switch Hardware Customization for Networks on Chips", Proc. of 1st International Conference on Nano-Networks (Nano-Net 2006), 14-16 September 2006, Lausanne (Switzerland)
C28 G. Angius, C. Manca, D. Pani, L. Raffo, "Cooperative VLSI Tiled Architectures: Stigmergy in a Swarm Coprocessor", Ant Colony Optimization and Swarm Intelligence, 5th International Workshop, ANTS2006, Editors: M. Dorigo, L.M. Gambardella, M. Birattari, A. Martinoli, R. Poli, T. Stutzle, Vol.4150, Series LNCS, Springer Verlag, Berlin, Germany.
C27 G. Angius, D. Pani, L. Raffo, "Applicazione della Swarm Intelligence alla Progettazione di Co-processori Integrati Cooperativi", Proceedings III Workshop Italiano di Vita Artificiale, WIVA3, Siena, 12-15 settembre 2006.
C26 I. Manunza, E. Orgiu, A. Caboni, M. Barbaro, A. Bonfiglio (2006). "Producing Smart Sensing Films by Means of Organic Field Effect Transistors". Proc. of IEEE Engingeering in Medicine and Biology (EMB 2006), 30 August - 3 September 2006, New York (USA)
C25 G. Busonera, S. M. Carta, A. Marongiu, L. Raffo, "Automatic application partitioning on FPGA/CPU systems based on detailed low-level information", 9th EuroMicro Conference on Digital System Design (DSD EUROMICRO 2006), 30 August - 1 September 2006, Dubrovnik (Croatia)
C24 G. N. Angotzi, M. Barbaro, L. Raffo (2006). "A Reconfigurable CMOS Imager for Real-Time, Spatio-Temporal Image Processing with On-Chip ADC". Proc. of IEEE Ph. D. Research in Microelectronics and Electronics (IEEE PRIME 2006) , 11-16 June 2006, Otranto (Italy).
C23 M. Barbaro, A. Bonfiglio, A. Murroni, L. Raffo, A. Alessandrini, P. Facci, I. Barak (2006). "A standard CMOS biosensor for detection of DNA hybridization". MRS Spring Meeting, 17-21 April 2006, San Francisco (USA).
C22 S. Stergiou, F. Angiolini, S. M. Carta, L. Raffo, D. Bertozzi, G. De Micheli (2005). "xpipes Lite: A Synthesis Oriented Design Flow For Networks On Chip". Proc. of Design and Automation Test Conference, 7-11 March 2005, Munich (Germany), pp.1188-1193
C21 F. Angiolini, P. Meloni, D. Bertozzi, L. Benini, S. Carta, L. Raffo (2005). "Network On Chip: a synthesis perspective ". Parallel Computing Minisymposium, 12-16 September 2005, Malaga (Spain).
C20 M. Barbaro, A. Bonfiglio, A. Murroni, L. Raffo, A. Alessandrini, P. Facci, I. Barák (2005). "A field-effect, standard CMOS, fully integrated biosensor for DNA detection". Proc. of Eurosensors XIX, 11-14 September 2005, Barcelona (Spain).
C19 M. Barbaro, A. Bonfiglio, A. Murroni, L. Raffo, A. Alessandrini, P. Facci, I. Barák (2005). "A standard CMOS biosensor for detection of DNA hybridization". 2nd Focused Workshop on Electronic Recognition of Bio-Molecules (ERBM-2), 7-9 September 2005, Urbana-Champaign (U.S.A.).
C18 D. Pani, G. Passino, L. Raffo, “Run-time Adaptive Resources Allocation and Balancing on Nanoprocessors Arrays ”, 8th EUROMICRO Conference on Digital System Design (DSD 2005), Porto, Portugal, August 30 th – September 3 rd 2005
C17 D.Pani , L.Raffo (2004). "A Swarm Intelligence Based VLSI Multiplication-and-Add Scheme". Parallel Problem Solving from Nature - PPSN VIII: 8th International Conference - Birmingham, UK. September 18-22, 2004. (pp. 360-369). ISBN/ISSN: 3-540-23092-0.
C16 D.Pani, L.Raffo (2004). "A VLSI Multiplication-and-Add Scheme Based on Swarm Intelligence Approaches". Ant Colony, Optimization and Swarm Intelligence: 4th International Workshop, ANTS 2004, Brussels. September 5-8, 2004. (pp. 13-20). ISBN/ISSN: 3-540-22672-9.
C15 S. M. Carta and L. Raffo, "Processing Time Saving in Low Power Voice Coding Applications Using Synchronous Reconfigurable Co-Processing Architecture", Proceedings of IEEE ICECS 2002 September 15-18, 2002, Dubrovnik (Croatia)
C14 M. Barbaro and L. Raffo, "A low-power CMOS silicon retina for feature extraction in real-time, embedded systems", Proceedings of ESSCIRC 2001, 18-20 Settembre 2001, Villach (Austria), pp.224-227.
C13 S. Bolliri, P. Porcu, and L. Raffo. "A Micro-Power Mixed Signal IC for Battery-Operated Burglar Alarm Systems". Proceedings of the 2000 International Symposium on Low Power Electronics and Design, Rapallo-Italy, pp. 73-77, 26-27 July 2000.
C12 L. Raffo and Zizola M.P. Block-matching evaluation in digital architectures for motion estimation. Proceedings of IEEE-ISCAS00 conference. (vol. IV, pp. 305-309). 2000.
C11 M. Barbaro and L. Raffo "Design of an analog front-end device for low-level image processing", DCIS'2000, Montpellier, France, 21st - 24th 2000
C10 Alimonda A., Carta S.M. and L. Raffo A modular digital VLSI architecture for stereo-depth estimation in industrial application. Proceedings of IEEE-ISCAS99 conference. (vol. IV, pp. 481-484). 1999.
C9 M. Barbaro, A. Nazzaro and L. Raffo, "Synthesys of a recurrent, double-layer transistor network for early vision tasks", IEEE-ISCAS'98 Conference, Monterey, California (USA), May 30- June 3, 1998
C8 G.M. Bisio, M. Confalone, L. Raffo and S.P. Sabatini. Hardware solutions supporting a multiscale approach in early vision. In NEURAP Conference, 1998.
C7 G.M. Bisio, G.M. Bo, M. Confalone, L. Raffo, S.P. Sabatini, and M.P. Zizola. An analog vlsi computational engine for early vision tasks. In ICANN'97, Lousanne, Swiss, September 1997.
C6 G.M. Bisio, G.M. Bo, M. Confalone, L. Raffo, S.P. Sabatini, and M.P. Zizola. A current-mode computational engine for stereo disparity and early vision tasks. In MicroNeuro'97, Dresden, Germany, September 1997.
C5 F. Bruccoleri, L. Raffo, Sabatini, and G.M. Bisio. A tunable perceptual microsystem for stereo depth estimation. In 2nd IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design, Baveno, Italy, September 1997.
C4 L. Raffo, M. Confalone, M.P. Zizola, G.M. Bo, and G.M. Bisio. A current-mode chip for low-level analog vision systems. In 1st IEEE-CAS Workshop on Design of Mixed Mode IC and applications, Cancun, Mexico, July 1997.
C3 S.P. Sabatini, L. Raffo, F. Solari, A. Bonfiglio, and G.M. Bisio. Smart materials for visual perception. In EAEC'97 Congress, Conference IV ``Advanced Automotive Electronics'', Cernobbio, Italy, July 1997.
C2 L. Raffo, S.P. Sabatini, G.M. Bo, and G.M. Bisio. Visual perception microsystems based on distributed analog VLSI processing. In Proc. 2nd Int. Workshop on Mechatronical Computer Systems for Perception and Action, MCPA'97, Pisa, Italy, February 1997.
C1 G.M. Bisio, B. Crespi, L. Raffo, S.P. Sabatini, G. Soncini, and A. Valdes. A distributed adaptive architecture for analog stereo depth estimation. In Proc. IEEE Int. Workshop on Neural Networks for Identification, Control, Robotics, and Signal/Image Processing (NICROSP'96), pages 360-367, Venice, Italy, August 1996.